/* PCIe media and diagram additions to the shared article stylesheet. */
.pcie-switch-page .back-link {
  display: inline-block;
  margin-bottom: 28px;
  color: var(--ink-mute);
  font-size: 13px;
  text-decoration: none;
}
.pcie-switch-page .demo-heading {
  display: flex;
  align-items: baseline;
  justify-content: space-between;
  gap: 20px;
  margin-bottom: 16px;
}
.pcie-switch-page .demo-heading span {
  color: var(--ink-mute);
  font: 400 12px/1.5 var(--mono);
}
.pcie-switch-page .article-demo video {
  display: block;
  width: 100%;
  aspect-ratio: 16 / 9;
  background: #0d1117;
}
.pcie-switch-page .demo-chapters {
  display: grid;
  grid-template-columns: repeat(4, minmax(0, 1fr));
  gap: 8px;
  margin-top: 16px;
}
.pcie-switch-page .demo-chapters button {
  padding: 9px 14px;
  border: 1px solid var(--line);
  border-radius: 2px;
  background: white;
  color: var(--ink-dim);
  cursor: pointer;
  font-size: 12px;
}
.pcie-switch-page .demo-chapters button:hover,
.pcie-switch-page .demo-chapters button[aria-pressed="true"] {
  color: var(--accent);
  border-color: var(--accent);
  background: var(--paper-warm);
}
.pcie-switch-page .demo-chapters button span {
  margin-right: 9px;
  color: var(--accent);
  font-family: var(--mono);
}
.pcie-switch-page .architecture-figure {
  margin: 36px 0 0;
}
.pcie-switch-page .architecture-figure picture,
.pcie-switch-page .architecture-figure img {
  display: block;
  width: 100%;
}
.pcie-switch-page .architecture-figure img {
  height: auto;
  aspect-ratio: 1440 / 1160;
}
.pcie-switch-page .architecture-figure figcaption {
  margin-top: 12px;
  color: var(--ink-mute);
  font-size: 13px;
  line-height: 1.7;
  max-width: 800px;
}
.pcie-switch-page .pcie-interface-note {
  margin-top: 14px;
}
.pcie-switch-page .pcie-interface-note strong {
  display: block;
  color: var(--ink);
  font-weight: 600;
  margin-bottom: 5px;
}
.pcie-switch-page .pcie-interface-note p + p {
  margin-top: 4px;
}
.pcie-switch-page .article-results.switch-results {
  min-width: 760px;
}
.pcie-switch-page .switch-results th:first-child {
  width: 34%;
}
.pcie-switch-page .switch-results td {
  font-variant-numeric: tabular-nums;
}
.pcie-switch-page .switch-results tr.group-start > * {
  border-top: 2px solid var(--line);
}
.pcie-switch-page .switch-results td small {
  display: block;
  margin-top: 2px;
  color: var(--ink-mute);
  font-size: 13px;
}
.pcie-switch-page .engineering-details-block .article-specs {
  margin-top: 0;
}
@media (max-width: 650px) {
  .pcie-switch-page .demo-heading {
    align-items: start;
  }
  .pcie-switch-page .demo-heading span {
    font-size: 10px;
    white-space: nowrap;
  }
  .pcie-switch-page .demo-heading .site-eyebrow {
    font-size: 11px;
  }
  .pcie-switch-page .demo-chapters {
    grid-template-columns: repeat(2, minmax(0, 1fr));
  }
  .pcie-switch-page .demo-chapters button {
    text-align: left;
  }
  .pcie-switch-page .architecture-figure img {
    aspect-ratio: 600 / 1770;
  }
}
@media print {
  .pcie-switch-page .demo-chapters {
    display: none;
  }
}